Nanophotonic Interconnects and 3D-stacked Technology for Future Many-core Architectures
نویسندگان
چکیده
Xiang Zhang and Ahmed Louri Electrical and Computer Engineering, University of Arizona, Tucson, AZ 85721 E-mail:{ zxkidd, louri}@ece.arizona.edu Abstract: We explore silicon photonics and 3D stacked technology to implement a photonic network-on-chips. The proposed scheme provides 2.56 Tb/sec bandwidth with a much reduced power consumption and latency compared to any leading on-chip photonic networks. ©2009 Optical Society of America OCIS codes: (200.4650) Optical Interconnects; (250.6715) Switching
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